1. Field of the Invention
This invention relates generally to a method of manufacture of memory devices for integrated circuits and more particularly to programmable conductor memory arrays comprising glass electrolyte elements.
2. Description of the Related Art
The digital memory most commonly used in computers and computer system components is the dynamic random access memory (DRAM), wherein voltage stored in capacitors represents digital bits of information. Electric power must be supplied to the capacitors to maintain the information because, without frequent refresh cycles, the stored charge dissipates, and the information is lost. Memories that require constant power are known as volatile memories.
Non-volatile memories do not need frequent refresh cycles to preserve their stored information, so they consume less power than volatile memories. The information stays in the memory even when the power is turned off. There are many applications where non-volatile memories are preferred or required, such as in laptop and palm-top computers, cell phones or control systems of automobiles. Non-volatile memories include magnetic random access memories (MRAMs), erasable programmable read only memories (EPROMs) and variations thereof.
Another type of non-volatile memory is the programmable conductor or programmable metallization memory cell, which is described by Kozicki et al. in (U.S. Pat. No. 5,761,115; U.S. Pat. No. 5,914,893; and U.S. Pat. No. 6,084,796 ), which are incorporated herein by reference. The programmable conductor cell of Kozicki et al. (also referred to by Kozicki et al. as a “metal dendrite memory”) comprises a glass ion conductor, such as a chalcogenide-metal ion glass and a plurality of electrodes disposed at the surface of the fast ion conductor and spaced a distance apart from on another. The glass/ion element shall be referred to herein as a “glass electrolyte,” or, more generally, “cell body.” When a voltage is applied to the anode and the cathode, a non-volatile conductive pathway (considered a sidewall “dendrite” by Kozicki et al.) grows from the cathode through or along the cell body towards the anode. The growth of the dendrite depends upon applied voltage and time; the higher the voltage, the faster the growth rate; and the longer the time, the longer the dendrite. The dendrite stops growing when the voltage is removed. The dendrite shrinks, re-dissolving metal ions into the cell body, when the voltage polarity is reversed.
In the case of a dielectric material, programmable capacitance between electrodes are programmed by the extent of dendrite growth. In the case of resistive material, programmable resistances are also programmed in accordance with the extent of dendrite growth. The resistance or capacitance of the cell thus changes with changing dendrite length. By completely shorting the glass electrolyte, the metal dendrite can cause a radical change in current flow through the cell, defining a different memory state.
The recent trends in memory arrays generally have been to form first a via, then fill it with a memory storage element (e.g., capacitor) and etch back. It is simple to isolate individual memory cells in this way. Programmable memory cells have been fabricated also using a container configuration, wherein the electrodes and body layers are deposited into a via etched into an insulating layer. The dendrites were believed by Kozicki et al. to grow along the interface between the cell and the via wall. Typically, the memory cell is formed in an array having a conventional DRAM-type circuit design. For example, in a conventional cross-point circuit design, memory elements are formed between upper and lower conductive lines at intersections. Typically, a via is formed in an insulating layer and filled with the memory element, such as a glass electrolyte or glass fast ion diffusion (GFID) element.
Heretofore known structures for PMC memory arrays are rather limiting. For example, it has often been found difficult to deposit component films for a PMC device to fill small vias. Accordingly, a need exists for novel methods and structures for exploiting the potential of PMC technology.
Accordingly, a need exists for improved methods and structures for forming integrated programmable conductor memory arrays.